ichirou1992

@Chris Pratt Unfortunately, it's an Intel... Oh well, I'll wait and also ask around for the trickier ones.

So the order in which integralfx wrote out their guide is actually quite important to follow along to the book then. I think my only issue is probably the secondaries (tWTR_S/L, tCWL, and tWRPRE). They involve a lot of interlocking math that complicates things, and they didn't really explain it in a way that's easy to understand. Do you have any idea what the ELI5 is for those timings are?

I've been fiddling with a lot of subtimings lately, but they haven't really resulted in much in AIDA64. Google hasn't really given me any clear information on what is or isn't important, besides tCAS, tRFC, tREFI, and CR. What are the other timings I should be focusing on for the most noticeable gain in performance? It feels like a waste of time to stabilize lower subtimings just for no meaningful difference (and in some cases, regression). I've largely been following this guide: https://github.com/integralfx/MemTestHelper/blob/master/DDR4 OC Guide.md