A PCIe splitter is a simple enough concept, take one bus and make it accept multiple signals. However, is the opposite possible? Could you wire a single PCIe x16 bus into 2 x16 slots on a board? The reason I ask is because PCIe 2.0 is half the bandwidth of 3.0, and 4.0 will double that, so if you needed a bunch of bandwidth but had legacy slots, could they be addressed as one connection?
I don't see how what you're thinking of doing would actually work.
The pci-e lanes can not be combined just like that in your motherboard, it's not like you have a 48 port ethernet switch (where each port is analogy for a x1 lane). It's more like having multiple pci-e controllers inside the chipset and in the cpu and each controller can do 16 lanes, and allows for those lanes to be arranged in multiple combinations (like 1x16, 2x8, 1x8+2x4, 1x4+4x1 etc ... you have a limited number of devices allowed per set of 16 lanes)
These controllers each with a number of lanes can't work together to mix their lanes with another controller's lanes, each controller has its own region of memory where data packets are moved and all that.
Also keep in mind that on most motherboards, you have some slots that are more special than others, as they're connected to the cpu and therefore have higher read/write speeds to computer RAM. Other pci-e slots come from the chipset, which has a communication channel with the cpu that runs at lower speed.
So for example a video card running at pci-e x16 v3.0 from cpu can read or write from cpu at 16 x ~970 MB/s = ~15.8 GB/s but if you have the video card in a pci-e x16 v2.0 slot created by the chipset you have 16 x 500 MB = 8 GB/s between the video card and chipset, but the chipset has only 4 GB/s between itself and the cpu (therefore RAM) ... so really your video card would only read and write data from ram at 4 GB/s
Most CPUs only give 16 lanes which can be arranged by motherboard makers for video cards into x16 or 2 x 8 but that's about it. Exceptions are processors like Threadripper with 60 lanes which can be arranged in x16 slots or subsets of a x16
So you're making the assumption that if you have 2 x16 v2.0 slots on the motherboard, you may have 2 x 16 x 500 MB/s = 16 GB/s which is equivalent to pci-e x16 v3.0 , so you think in theory you could make a chip that would behave like a 1x16 v3.0 <---> 2x16 v2.0 converter but you would either have those x16 v2.0 slots on separate controllers (so not possible) , or you wouldn't actually have 2x16 electrically, you would have 2x8 electrically on the moterboard.
The other way is easy because the chips like PLX create 32 lanes and arrange them in 2 x 16 or whatever combination desired and combined and buffer the data from all devices to push into a single x16 (or smaller channel) - the chip is dealing with a single "controller" on the motherboard, so it works.
PS. Another reason why it would be super hard is because pci-e 2.0 uses a particular encoding (8b/10b) for data packets and pci-e 3.0 uses another encoding (128/130b) and pci-e v4 keeps this encoding. So any chip that converts between pci-e 3.0 and 2.0 would have to be fast enough and have enough cache memory to process 1 GB/s per lane of data packets encoded in 128b/130b and convert these in 8b/10b encoded data packets (therefore losing around 1.5% of bandwidth in overhead and do a whole load of other things, all on the fly. Its not easy, it's a lot of transistors, it's a lot of silicon die space for something that would be very low demand so probably not worth investing hundreds of thousands of dollars in designing such chip.