Can someone explain Intel's "Tick Tock" cycle and their new 3-way cycle?

[boba99999]

I heard Intel is going from their Tick Tock cycle to a 3 way cycle. What does that mean?

[DrM]

they stay on the same process node for 3 generations. before, it was node shrink, then optimizations (e.g. ivy bridge > haswell were both 22nm). now its node shrink, optimizations, then more optimizations (so broadwell > skylake > kabylake, all on 14nm)

[arnavvr]

Then is it 10nm or 8nm?

[daniellearmouth]

The Tick-Tock model was adopted by Intel in 2007 as a means of roadmapping processor microarchitecture advancement by creating a brand new microarchitecture (the 'Tock') followed by shrinking it down to a smaller process (the 'Tick').

 

When the Nehalem microarchitecture released in 2008 (bringing about the i3, i5 and i7 series of CPUs), that was Intel's 'tock' - their new microarchitecture. Intel then made improvements and shrunk down the process from 45nm (nanometres) to 32nm to create Westmere - the 'tick' - in 2010.

Sandy Bridge released in 2011 as a new microarchitecture, followed by Ivy Bridge in 2012.

 

Likewise, in 2013 Haswell released, but in this case Haswell was refreshed, giving us the 4790 and the 4690 as a replacement for the 4770 and 4670 respectively. This was due to complaints of overheating compared to Sandy Bridge CPUs, so Intel changed the thermal material used to allow the heatspreader to dissipate heat from the die.

This refresh was followed by Broadwell, with much confusion - Broadwell was very difficult to acquire as barely anyone sold them (as far as I could tell, at least), and that was due to the process they were on. Haswell was a 22nm architecture, whilst Broadwell was a 14nm architecture. Reducing the size of the process is a sure-fire way to make it harder to cool and make more reliable, and the more you push against physics, the harder physics pushes back.

 

Onto 2015 and the release of Skylake. Skylake is the top of the line as of now for consumers, but soon came an issue. Skylake was touted to have a process reduction in the form of Cannonlake, but because of how hard it was for Intel to stick to Moore's Law (the doubling-up of transistors for each new architecture), Intel determined that it would abandon modify their Tick-Tock model to account for a third instance.

 

The Tick and the Tock remain unchanged. Skylake released last year as a 14nm architecture, and with a projected release at the second half of 2017, Cannonlake will follow on a 10nm process. So what about the middle? That's where this step comes in.

Similar to how Haswell was handled, Skylake will be refreshed (or optimised, if you will) in the form of Kaby Lake - an improved Skylake with newer CPUs and newer features. And this is where the new Tick-Tock model comes in.

 

Whilst Intel before had Tick-Tock, Intel now have Process -> Architecture -> Optimisation. And 'Processor -> Architecture -> Optimisation' pretty much sums it up, really.