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TSMC to Start Risk Production Using 4nm Node in Q3 2021

Lightwreather

Summary

Taiwan Semiconductor Manufacturing Co. is on track to start risk production of chips using its N4 (4 nm) fabrication technology in the third quarter, according to TSMC and DigiTimes' sources in the semiconductor supply chain. The new node will enable chipmakers to slightly shrink the N5 design and further optimize power consumption and performance in 2022. 

 

Quotes

Quote

Taiwan Semiconductor Manufacturing Co. is on track to start risk production of chips using its N4 (4 nm) fabrication technology in the third quarter, according to TSMC and DigiTimes' sources in the semiconductor supply chain. The new node will enable chipmakers to slightly shrink the N5 design and further optimize power consumption and performance in 2022. TSMC's N4 belongs to the company's N5 family that also includes N5, N5P, and N5HPC. While all of these technologies rely on both deep ultraviolet lithography (DUV) and extreme ultraviolet lithography (EUV), as well as have many things in common, they are still quite a bit different and are designed for differing applications.TSMC's N5P is a performance-enhanced version of N5 that boosts frequency potential by up to 5% or decreases power consumption by up to 10% (at the same transistor count). The node offers a seamless migration from N5, so it should be fairly easy to migrate a design or IP from N5 to N5P should the designer need to increase performance (or decrease power consumption) of their system-on-chips (SoCs) now. This technology is believed to be available now. 

N4 is a further evolution of N5 that will enable a 6% smaller die area via an optical shrink and some further power and performance advantages enabled by BEOL (back end of line) enhancements. It continues to use N5's design rules, design infrastructure, SPICE simulation programs, and IPs. Yet, N4 will use EUV scanners for more layers, which will reduce mask counts, process steps, and costs. 

While TSMC's N4 is certainly not a revolutionary fabrication process, it is still very important for the foundry's existing customers and will be used for years to come for mainstream SoCs.  

With risk production using N4 in Q3 2021, we can expect N4 to hit the high-volume manufacturing (HVM) milestone in late 2021 or early 2022. TSMC's biggest customers could adopt N4 earlier than other companies as they have access to new nodes ahead of other players. for high-performance applications that need high clocks, TSMC will offer its N5HPC technology starting from Q2 2022. This node will provide an up to 7% higher frequency when compared to N5 when combined with BEOL enhancement while maintaining design rule compatibility. N5HPC will be particularly useful for general-purpose processors that need high clocks given their bursty behavior. 

 

My thoughts

This is pretty great. We're already starting to hit 4nm, and it seems that we will be able to see manufacturing in large-scale in Q4 2021 - Q1 2022, and I'm pretty sure apple would switch over to it. But yea, a 10% increase in power-efficiency or 5% increase in clock speeds is pretty nice and certainly nothing to scoff at. And then there's also 5nm HPC. I just hope that Intel will be able to catch up to it soon (seems unlikely but yea)

 

Sources

https://www.tomshardware.com/news/tsmc-on-track-for-n4-risk-production-in-q3-2021
https://www.digitimes.com/news/a20210618PD208.html

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It's spelled RISC.

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7 hours ago, Lord Bloobus said:

It's spelled RISC.

no, it's risk

 

Risk Production means that a particular silicon wafer fabrication process has established baseline in terms of process recipes, device models, and design kits, and has passed standard wafer level reliability tests.

 

they need to be able to prove that they can get 4nm down before taking orders. they are taking a "risk" by attempting to produce something before any one can start to buy it (if it's even successful)

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Here I am more interested in N7HPC and N5HPC, one coming very soon and the other middle/beginning next year.

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3 hours ago, leadeater said:

Here I am more interested in N7HPC and N5HPC, one coming very soon and the other middle/beginning next year.

they dont seem that impressive or am i missing something?

Quote
  • N7HPC and N5HPC

An indication of the demanding performance requirements of the HPC platform is the customer interest in applying supply voltage “overdrive”, above the nominal process VDD limit. TSMC will be offering unique “N7HPC” (4Q21) and “N5HPC” (2Q22) process variants supporting overdrive, as illustrated below.

N7HPC

There will be a corresponding SRAM IP design release for these HPC technologies.  As expected, designers interested in this (single digit percentage improvement) performance option will need to address increased static leakage, BEOL reliability acceleration factors, and device aging failure mechanisms.  TSMC’s investment in the development and qualification of processes specifically optimized for individual platforms is noteworthy.  (The last HPC-specific process variant was at the 28nm node.)

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Finally, there are two new processes: N7HPC and N5HPC with overdrive. These have higher performance at the cost of some increase in leakage. This is the first time since 28nm that TSMC has had a process optimized for HPC. Data is in the tables below:Screen-Shot-2021_2D00_06_2D00_02-at-12.5

Screen-Shot-2021_2D00_06_2D00_02-at-12.5

 

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9 hours ago, Arika S said:

no, it's risk

 

Risk Production means that a particular silicon wafer fabrication process has established baseline in terms of process recipes, device models, and design kits, and has passed standard wafer level reliability tests.

 

they need to be able to prove that they can get 4nm down before taking orders. they are taking a "risk" by attempting to produce something before any one can start to buy it (if it's even successful)

This is true.
You can think of it as what they will be making would be BETA hardware to work out any potential problems/kinks and fix those before taking them mainstream.

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1 hour ago, cj09beira said:

they dont seem that impressive or am i missing something?

They aren't, but they are just better suited to high clock CPUs so I'd like to see some N7HPC refresh 5000 series and then the next generation directly use N5HPC rather than any of the other N5 node variants.

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3 minutes ago, leadeater said:

They aren't, but they are just better suited to high clock CPUs so I'd like to see some N7HPC refresh 5000 series and then the next generation directly use N5HPC rather than any of the other N5 node variants.

it might be too late for n7hpc, as i believe that the stepping that was just released in the last month was made to add support for the stacking of cache, but maybe zen 4 could use n5hpc, although then they might need 2 versions of the die as it might not be a good idea to use it on the server die

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17 minutes ago, cj09beira said:

although then they might need 2 versions of the die as it might not be a good idea to use it on the server die

EPYC 4 is quite some time away, they only just launched the new generation.

 

The HPC variants only make sense for XT revisions, not much else. Just be cool to actually get something from an XT even if it's only 5%-7% higher clocks it's better than the nothing with the 3000 series XT lol

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3 minutes ago, leadeater said:

EPYC 4 is quite some time away, they only just launched the new generation.

 

The HPC variants only make sense for XT revisions, not much else. Just be cool to actually get something from an XT even if it's only 5%-7% higher clocks it's better than the nothing with the 3000 series XT lol

or if they ever start having separate server and consumer dies

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I wonder if Apple will use 4nm chips this year. It's the sort that would be likely to do it, but risk production in Q3 would make things awfully tight if the next iPhone/iPad/Mac wave starts in September. You might just see Apple stick with an optimized 5nm process instead.

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10 hours ago, Commodus said:

but risk production in Q3 would make things awfully tight if the next iPhone/iPad/Mac wave starts in September.

If I'm remembering correctly Apple was the TSMC 5nm risk production partner so if Apple wants to use N4 process it could well be the case again that what is being made is Apple chips.

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18 hours ago, Commodus said:

I wonder if Apple will use 4nm chips this year. It's the sort that would be likely to do it, but risk production in Q3 would make things awfully tight if the next iPhone/iPad/Mac wave starts in September. You might just see Apple stick with an optimized 5nm process instead.

Apple usually is the risk production partner so they will likely use 4nm chips this year. But, yes, Q3 is probably too tight for the iPhones, it's usually Q2 for A-series risk production so I'm guessing the A15 and Apple Watch S7-chip are on N5P to launch in September and N4 is for the M2-chip* in the new MacBooks, likely launching later in October. 

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