Sapphire Rapids delidded

[porina]

Quotes

Quote

Being a sample rather than a commercial product, the processor is marked as Intel Confidential and features the QVV5 sSpec, along with a 1.30 GHz frequency. The image was published by YuuKi_AnS, a known hardware leaker who sometimes has access to unreleased chips. 

 

We confirmed the CPU's validity with an independent source with knowledge of the matter, who identified the device as a 28-core Sapphire Rapids A2 sample that Intel sent to partners several weeks ago.

Summary

Sapphire Rapids is Intel's generation of server CPU after Ice Lake and will be their 2nd 10nm offering in that area. Ice Lake server is only just going into volume production right now and has been long delayed. It can be seen there are 4 "chiplets" on the package. These are claimed to each have up to active 14 cores, giving a maximum total of 56 cores for the package. It is claimed this engineering sample only has 28 cores, implying either 4x7 cores or 2x14 cores active.

 

My thoughts

Most of us here might not care about server stuff, but this may give some insight to how Intel are approaching future designs that might also come to desktop. AMD bought chiplets to the volume mainstream with Zen 2 and people have asked if/how Intel will follow. We see 4 dies presumably interconnected to each other directly, not using the IoD approach AMD does. This more closely resembles traditional multi-chip connection philosophy. With my bad photoshop skills, I estimate each chiplet is about 370mm² but allow a tolerance on that. For comparison an 8 coire Zen 2 core die is 74mm². A difference here of course is that the Zen 2 CCD only has cores, cache and connectivity to the outside world. Each of the Sapphire Rapids cores would have everything including memory controller also, as well as more cores. Maybe a more interesting comparison are Intel's other CPUs. The 10 core 10900k weighs in at 206mm². The up to 18 core Skylake-X parts have an estimated die size of 484mm². If we draw comparisons with mobile, Sapphire Rapids is closer to Tiger Lake than Ice Lake. The main difference between them are bigger caches so that may be a large contributor to the die size.

 

Sources

Tom's Hardware for article, pictures better accessed from Twitter below.

https://www.tomshardware.com/uk/news/sapphire-rapids-pictured-lga4677

Edit: original source has also posted to forums!

 

 

 

[jagdtigger]

8 minutes ago, porina said:

Each of the Sapphire Rapids cores would have everything including memory controller also, as well as more cores.

So it would be like a quad cpu motherboard disguised as a single cpu? That 1.3 GHz clock is pretty low.....

[RejZoR]

2 minutes ago, jagdtigger said:

So it would be like a quad cpu motherboard disguised as a single cpu? That 1.3 GHz clock is pretty low.....

And still just 28 cores? It seems like Intel has been hanging on 28 cores for like 10 years now...

[porina]

4 minutes ago, jagdtigger said:

So it would be like a quad cpu motherboard disguised as a single cpu? That 1.3 GHz clock is pretty low.....

It's an engineering sample, and they tend to have lower clocks. Also that's probably only the base clock, we don't know if there is some boost above that.

 

Just now, RejZoR said:

And still just 28 cores? It seems like Intel has been hanging on 28 cores for like 10 years now...

That particular sample is said to be 28 cores, but the maximum configuration is claimed to be 56 cores.

[TrigrH]

nice glue intel

[Levent]

Looks like its gonna be fun to cool that chip down.

[porina]

20 minutes ago, jagdtigger said:

So it would be like a quad cpu motherboard disguised as a single cpu?  

Forgot to reply to this part earlier. We don't know how it will look from an OS view but this could look something like a quad socket system but in one socket. By going chiplet Intel will also run into the same limitations that AMD have already done since Zen 2, when compared to a single large monolithic CPU. It might be possible Intel are doing something new and different. Can they get sufficient inter-die connectivity to make them look more like a single CPU than AMD does?

 

3 minutes ago, Levent said:

Looks like its gonna be fun to cool that chip down.

Should be easy. Looks like a large surface area. Even though recent AMD CPUs tend to run lower operating power than comparable Intel CPUs, the Intel CPUs are a lot easier to cool thanks to area. The drop to 10nm might reduce some of that advantage though.

 

 

Elsewhere: I have been digging around to see what was out there on Ice Lake. I saw a die shot of Ice Lake LCC (16 core) die and that had a claimed area of 370mm², same as what I estimated here for Sapphire Rapids. The drop in 2 cores might be due to the larger caches.

[Sauron]

21 minutes ago, RejZoR said:

And still just 28 cores? It seems like Intel has been hanging on 28 cores for like 10 years now...

Up until now the 28 core cpus have been of monolythic design. It's impressive enough that they managed to cram that many in a single chip, they probably ran into some hard limit making it too hard to add more for it to be worth it. This is a different design with 4 14 core ""chiplets"" and therefore up to 56 total cores.

[leadeater]

28 minutes ago, jagdtigger said:

So it would be like a quad cpu motherboard disguised as a single cpu? That 1.3 GHz clock is pretty low.....

It's not actually that odd, Intel already has a ton of Xeon CPUs with base clocks between 1.8GHz to 2.2GHz with less cores than even 24 let alone 56. Retail variants likely won't be as low as 1.3GHz though. It's not like CPUs ever run at base clocks though.

[jagdtigger]

1 hour ago, porina said:

Can they get sufficient inter-die connectivity to make them look more like a single CPU than AMD does?

Main question is how bad is the performance hit when a core needs data from ram that is connected to a different chip....

[cj09beira]

thats a lot of silicon 

[ravenshrike]

1 hour ago, porina said:

Looks like a large surface area.

How much heat do server memory controllers produce?

[porina]

56 minutes ago, jagdtigger said:

Main question is how bad is the performance hit when a core needs data from ram that is connected to a different chip....

Until we get more information about how it is connected we don't know that. It essentially comes down to how they are connected. At worst case it could be like a 4 socket server implementation. But with the 4 dies physically adjacent to each other, there is scope for much better connectivity than when running traces to another socket on the mobo. There is more scope for faster and/or wider connection between dies.

 

On AMD side since Zen 2 there's already 2 hops to go from core, via IOD, to ram. That is kinda like the old days when the north bridge was a separate chip to the CPU cores, but now integrated a lot tighter. Still arguably a step back from monolithic though. They chose to trade off one area to advance others.

[Mark Kaine]

And I thought Saphire is making anime CPUs now reading the title. Good job OP, I will leave disappointed ~

 

PS: is it me or is that chip huge? (is it a pic of the real thing?)

PSS: ah the tweet just loaded in, bilibili, looks legit. 

 

 

[porina]

39 minutes ago, ravenshrike said:

How much heat do server memory controllers produce?

No idea. You can imagine it roughly scales with the number of channels, so in total may be more than a tiny dual channel unit in a consumer CPU, although speed likely also plays a factor. On top of that, server CPUs will have various forms of ECC potential, and this generation is also expected to go DDR5 which may be different again from what we know of DDR4.

 

1 minute ago, Mark Kaine said:

PS: is it me or is that chip huge? (is it a pic of the real thing?)

PSS: ah the tweet just loaded in, bilibili, looks legit. 

The original source is a well known leaker. While you can never say these things with 100% certainty, it is less sus than may other rumours.

 

As mentioned earlier, I estimated a single die area of 370mm², x4 = 1480mm².

 

For comparison, a 64 core Zen 2 Epyc will have 8 chiplets at 74mm² each, for a total 592mm². The IOD isn't small though, that's another 416mm² by itself, putting the Epyc total to 1008mm². If we similarly assume a 64 core Zen 3 Epyc will exist, Zen 3 chiplets are slightly bigger at 81mm² bringing the total up to 1064mm². So Intel are using more silicon here. Hope they are putting something good in it. Zen still lacks the higher FP64 processing rate and other AVX-512 extensions that can be found on some Intel CPUs and that likely accounts for some of the difference.