GlobalFoundries Halts 7nm Development

[mr moose]

1 hour ago, S w a t s o n said:

I've been reading that the combination of quad patterning, cobalt problems, COAG and density are what caused Intel's 10nm to shit the bed, they just pushed it too far and the cobalt was apparently developing micro-fractures along with quad patterning giving massive numbers of defects in general (possibly related to COAG) as even intel wasn't using EUV. TSMC and GloFo were both planning to use cobalt in gen 2, TSMC should still be so I'm not sure what you mean by that. Intel isn't working out any kinks in manufacturing they are just re-doing it.
 

Basically Intel went super hard on density, tried cobalt, tried COAG, and used quad patterning without EUV all at once for a single node.

With the density they were shooting for they had to use cobalt because copper won't work for 2 of the layers.   I believe they will sort out the cobalt issues without much issue (only because of their size and R+D budget), but the density sounds like it was too much for any process.

 

 

[Taf the Ghost]

1 hour ago, S w a t s o n said:

I've been reading that the combination of quad patterning, cobalt problems, COAG and density are what caused Intel's 10nm to shit the bed, they just pushed it too far and the cobalt was apparently developing micro-fractures along with quad patterning giving massive numbers of defects in general (possibly related to COAG) as even intel wasn't using EUV. TSMC and GloFo were both planning to use cobalt in gen 2, TSMC should still be so I'm not sure what you mean by that. Intel isn't working out any kinks in manufacturing they are just re-doing it.
 

Basically Intel went super hard on density, tried cobalt, tried COAG, and used quad patterning without EUV all at once for a single node.

TSMC used Copper for their 7nm, but will go with the Cobalt/Copper hybrid with 7nm+ & EUV, I believe. GloFo's 7nm was going be with expensive with low yields for a while. Intel is going to completely rework their metal layers for 10nm++ (Tigerlake & Sapphire Rapids). Cobalt seems to be the one consistent problem for everyone.

 

However, word about how Intel is backing off on density to get 10nm+ (Icelake) out the door suggests they might have moved back enough so they can do triple patterning rather than quad. That might be enough to solve the issue.

11 minutes ago, mr moose said:

With the density they were shooting for they had to use cobalt because copper won't work for 2 of the layers.   I believe they will sort out the cobalt issues without much issue (only because of their size and R+D budget), but the density sounds like it was too much for any process.

 

 

It's easy to hone in on the density, but I've seen some arguments that it probably isn't the density that's the issue with Intel's 10nm. That density level drove choices, and it's those choices that are really the big problem. When your research Fab is yielding around AMD's Server Market Share, circa 2015, you have a lot of problems to sort out.

[S w a t s o n]

7 minutes ago, Taf the Ghost said:

It's easy to hone in on the density, but I've seen some arguments that it probably isn't the density that's the issue with Intel's 10nm. That density level drove choices, and it's those choices that are really the big problem. When your research Fab is yielding around AMD's Server Market Share, circa 2015, you have a lot of problems to sort out.

Those choices being cobalt for 2 layers rather than just the wires, and COAG and quad patterning

[Jito463]

2 hours ago, Taf the Ghost said:

When your research Fab is yielding around AMD's Server Market Share, circa 2015, you have a lot of problems to sort out.