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AMD ryzen 80% have 8 working cores

TheNeonWhiteOne
1 minute ago, Dylanc1500 said:

Till you get the power bill lol

Considering even at 22nm those MCMs draw a lot of power.

dont worry about it, i dont pay my bills yet,

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Just now, Dylanc1500 said:

Till you get the power bill lol

Considering even at 22nm those MCMs draw a lot of power.

But then what chips are those ? IBM isn't known for extreme power efficiency , considering they have 5ghz plus chips on the market

AMD Ryzen R7 1700 (3.8ghz) w/ NH-D14, EVGA RTX 2080 XC (stock), 4*4GB DDR4 3000MT/s RAM, Gigabyte AB350-Gaming-3 MB, CX750M PSU, 1.5TB SDD + 7TB HDD, Phanteks enthoo pro case

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1 minute ago, Valentyn said:

Aye, it seems the 7nm process GloFo will be using from next year onwards was actually developed by IBM; so it should hopefully be really good as well.

 

That's if GloFo doesn't pull a GloFo and deliver a slightly inferior version :P

They should put on a competition between all of the chip makers. Whoever makes the better of all the of them would get the bid.

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2 hours ago, RadiatingLight said:

my 1600 overclocks to 32 cores and I flashed the BIOS to unlock 10Ghz

You are bottlenecking your system! Download more RAM asap!

1 hour ago, mariushm said:

 

The Ryzen 5 and Ryzen 7 are made out of 2 CCX (core complex) , basically 2 modules of 4 cores each.  The six core chips have one core of each core complex disabled.

 

The Ryzen 3 will most likely be made using just ONE core complex and maybe with less amount of Level 3 cache , and with all four cores enabled, because taking out one core complex and some memory would make them much smaller in area, and being so much smaller in surface area more of them would fit into a round 20-30cm silicon wafer and therefore they'd be more profitable to make.

 

it simply takes 6-8 months for a silicon chip that's physically different than previous chips (the ones with 2 core complexes) to go through the manufacturing process, to be packaged in the form you're used to and then have different firmware (microcode) written for it (has to be different because there's only one core complex instead of two, and the caches would also work slightly differently because of this and so on).

They are already shipping the Ryzen 5 1400, which are made of one core complex only (as opposed to the 1500X), so there has to be another reason.

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3 minutes ago, Coaxialgamer said:

But then what chips are those ? IBM isn't known for extreme power efficiency , considering they have 5ghz plus chips on the market

Old Power 8, they offered a 4, 6, 8, 10, and 12. From 2.5jiggahertz to 5. The 12 core having 96 MBs of L3 cache. 

 

They now have Power 9 at 14nm with 12 and 24 core with max clock of 4ghz. 

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1 minute ago, Dylanc1500 said:

They should put on a competition between all of the chip makers. Whoever makes the better of all the of them would get the bid.

A 7nm process factory would costs more than around 400-600 million dollars to make from start to finish. Not many companies can afford it.

 

It's also basically impossible to upgrade existing factories to that process, like it was done before (going from 32nm to 28nm to 20-22nm to 16 nm)  etc, below around 10-12nm they use different optical systems , different lasers have to be used, it's too much difference to be worth upgrading a factory.

 

Yes, stacking is difficult. That's one of the reasons by 8-hi stacks are so difficult to make, because the bottom chip in the stack would be much hotter than the top chip in the stack and the non-uniform heating can cause stress in the solder joints between stacks (metals expanding at different rates) and these HBM chips have thousands of connections between them.

Temperature is still a big deal when doing stacks of anything. Right now, the top of the line when it comes to stacking is Flash memory which is relatively cold, they can stack 64-96 layers of flash memory and make single chips.

 

 

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2 minutes ago, Dylanc1500 said:

Old Power 8, they offered a 4, 6, 8, 10, and 12. From 2.5jiggahertz to 5. The 12 core having 96 MBs of L3 cache. 

 

They now have Power 9 at 14nm with 12 and 24 core with max clock of 4ghz. 

power 9 is out ? Guess i don't keep up with IBM enough . To be fair their isn't much info on it compared to P8

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6 minutes ago, SpaceGhostC2C said:

You are bottlenecking your system! Download more RAM asap!

They are already shipping the Ryzen 5 1400, which are made of one core complex only (as opposed to the 1500X), so there has to be another reason.

The Ryzen 5 1400 is a 2+2 configuration of two CCXs.

 

The "die" for the process is actually 2 CCXs at once. They will have a 1 CCX design for the APUs, but those should also have a some different controller aspects.

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1 minute ago, Taf the Ghost said:

The Ryzen 5 1400 is a 2+2 configuration of two CCXs.

 

That's the 1500X. The 1400 is fully "halved", with half the L3 cache, etc.

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6 minutes ago, SpaceGhostC2C said:

 

They are already shipping the Ryzen 5 1400, which are made of one core complex only (as opposed to the 1500X), so there has to be another reason.

No, it's just a Ryzen 5 / 7 die with one core complex and its associated cache memory (l2 and l3 memory) disabled artificially. It's not different silicon chip. 

Yes, it may have the microcode (firmware inside) slighty different than other Ryzen cpus, but the physical die is still the big large one that all Ryzen 5 and Ryzen 7 have.

 

What I'm saying is that the Ryzen 3 should be from the start just ONE core complex, just 8 MB of L3 cache (maybe even less), a much smaller silicon die.

A bit off topic but it also wouldn't surprise me if they'll save a few pennies by not soldering the lid to the silicon die in these processors, since it won't matter than much .. it wouldn't surprise me if they use cheaper thermal paste between die and lid as Intel does.

 

 

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Just now, mariushm said:

No, it's just a Ryzen 5 / 7 die with one core complex and its associated cache memory (l2 and l3 memory) disabled artificially. It's not different silicon chip. 

Yes, it may have the microcode (firmware inside) slighty different than other Ryzen cpus, but the physical die is still the big large one that all Ryzen 5 and Ryzen 7 have.

If you are sure, I stand corrected then. I may have been assuming too much from the 8MB cache :P 

 

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23 minutes ago, mariushm said:

A 7nm process factory would costs more than around 400-600 million dollars to make from start to finish. Not many companies can afford it.

 

It's also basically impossible to upgrade existing factories to that process, like it was done before (going from 32nm to 28nm to 20-22nm to 16 nm)  etc, below around 10-12nm they use different optical systems , different lasers have to be used, it's too much difference to be worth upgrading a factory.

 

Yes, stacking is difficult. That's one of the reasons by 8-hi stacks are so difficult to make, because the bottom chip in the stack would be much hotter than the top chip in the stack and the non-uniform heating can cause stress in the solder joints between stacks (metals expanding at different rates) and these HBM chips have thousands of connections between them.

Temperature is still a big deal when doing stacks of anything. Right now, the top of the line when it comes to stacking is Flash memory which is relatively cold, they can stack 64-96 layers of flash memory and make single chips.

 

 

Oh I know it's far from practical. I would just be an interesting way of going about giving the contact out. More interestingly would be to see Intel making the chips with their fabs, I can safely assume that's never happening.

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Next big thing will be CPUs made from carbon nanotubes. They can conduct MUCH better than silicon, its just much harder to make nanotubes capable of being used as transistors.

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30 minutes ago, Coaxialgamer said:

power 9 is out ? Guess i don't keep up with IBM enough . To be fair their isn't much info on it compared to P8

They do I'm sure if you search around. They have a PDF with an in depth look on it. It has hundreds of pages though. I got it a long time ago through work.

 

Oh it's also offering SMT-4 and SMT-8.

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what if there are like 7nm or less ccx stacks. 7nm or less would help a bit for heat and such.

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2 hours ago, Coaxialgamer said:

AMD could just as easily disable the cores themselves . they don't need to wait for defective chips . 

 

Plus , they already have quad core parts on the market . SMT itself barely affects yields .

Margins. Why disable working cores to sell them for cheap? I realize there is market share and volume to be had but it isn't like Polaris. Selling a "big" chip at entry level prices would be bad hence I imagine they harvest bad dies. I know they already have quad core parts but there is also clock speeds and probably more to consider. Who knows?

1 hour ago, mariushm said:

No, it's just a Ryzen 5 / 7 die with one core complex and its associated cache memory (l2 and l3 memory) disabled artificially. It's not different silicon chip. 

Yes, it may have the microcode (firmware inside) slighty different than other Ryzen cpus, but the physical die is still the big large one that all Ryzen 5 and Ryzen 7 have.

 

What I'm saying is that the Ryzen 3 should be from the start just ONE core complex, just 8 MB of L3 cache (maybe even less), a much smaller silicon die.

A bit off topic but it also wouldn't surprise me if they'll save a few pennies by not soldering the lid to the silicon die in these processors, since it won't matter than much .. it wouldn't surprise me if they use cheaper thermal paste between die and lid as Intel does.

 

 

Source? I was under the impression all current Ryzen stuff would be the same die and they were playing the yields/binning game.

It would be weighing the cost between designing and producing a new chip versus binning the same design and perhaps occasionally having to gimp a good chip to meet demands.

Of course the new chip production and validation would explain the delays perfectly.

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26 minutes ago, Trixanity said:

Margins. Why disable working cores to sell them for cheap? I realize there is market share and volume to be had but it isn't like Polaris. Selling a "big" chip at entry level prices would be bad hence I imagine they harvest bad dies. I know they already have quad core parts but there is also clock speeds and probably more to consider. Who knows?

 

Margins aren't worth anything if demand isn't there. Even if AMD halve their margins by disabling cores, that's still better than having the chips collecting dust in some warehouse. 

Yields not being a problem,   they can just make more if need be. 

 

They most likely  already do it with the 1400 and 1500x, which are 4 core parts. 

 

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That's good, they need the cash flow indeed. 

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if thats true then fucking sell me one for 100$ when will that day come that hardware will be afordable, so i dont have to use decade old phenom ii x4

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Does this then make it possible for the Ryzen (or whatever is after it) consumer chips to hold 6 or 8 cores per CCX, or am I missing something important?

Read the community standards; it's like a guide on how to not be a moron.

 

Gerdauf's Law: Each and every human being, without exception, is the direct carbon copy of the types of people that he/she bitterly opposes.

Remember, calling facts opinions does not ever make the facts opinions, no matter what nonsense you pull.

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Just now, Colonel_Gerdauf said:

Does this then make it possible for the Ryzen (or whatever is after it) consumer chips to hold 6 or 8 cores per CCX, or am I missing something important?

No, because that would require a redesign.  The server chips are 8 core CCX's, but the consumer chips are still 4 core.  What this means is that out of every 100 Ryzen processors produced (prior to scaling them for whatever model is needed), 80 of them have all 8 cores working perfectly across both CCX clusters.  Or put another way, only 20 out of every 100 have to be cut down to a lower end chip because of manufacturing faults.

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4 minutes ago, Jito463 said:

No, because that would require a redesign.  The server chips are 8 core CCX's, but the consumer chips are still 4 core.  What this means is that out of every 100 Ryzen processors produced (prior to scaling them for whatever model is needed), 80 of them have all 8 cores working perfectly across both CCX clusters.  Or put another way, only 20 out of every 100 have to be cut down to a lower end chip because of manufacturing faults.

I was referring to the next few or so generations of chips, but fair point. In that case, we have no clue how AMD will handle generation cycles. I have a cautious hope that AMD scales down their chip base design but not architecture, as nVidia has been known to do with their GPUs. That might make it possible that what was considered server-grade hardware, will trickle down to the consumers, and even budget consumers, in a mere two or three years time.

Read the community standards; it's like a guide on how to not be a moron.

 

Gerdauf's Law: Each and every human being, without exception, is the direct carbon copy of the types of people that he/she bitterly opposes.

Remember, calling facts opinions does not ever make the facts opinions, no matter what nonsense you pull.

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A very reliable website quoting another very reliable website. This must be true. thumbsup.gif

 

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45 minutes ago, Colonel_Gerdauf said:

I was referring to the next few or so generations of chips, but fair point. In that case, we have no clue how AMD will handle generation cycles. I have a cautious hope that AMD scales down their chip base design but not architecture, as nVidia has been known to do with their GPUs. That might make it possible that what was considered server-grade hardware, will trickle down to the consumers, and even budget consumers, in a mere two or three years time.

The Roadmap from 2016 pointed to 48 core server chips on the Zen 2 architecture (now called Rome; previously Starship).  So they're definitely still thinking that way.

 

The interesting thing that we don't know right now is how the packages have to be aligned.  While the current Zeppelin "cores" is the 2 CCX on 1 Package, the CCX themselves are the interesting question. Could we see 6 core and 8 core CCX designs in Zen 2 & 3?  (It should be noted that Zen 2 is going to be a massive die shrink: 14 nm to 7 nm.)  If that's the way they go, then it could be something like 12c24t Consumer-level chips.

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3 hours ago, Jito463 said:

No, because that would require a redesign.  The server chips are 8 core CCX's, but the consumer chips are still 4 core. 

Probably wording is bad but just to clarify... as far as I know, the server processors are basically 4 ryzen dies, so there are 8 core complexes in a processor, each core complex with 4 cores and 4 threads. So overall, you have 4 times everything :  4 x 2 channel ddr4 x 2 slots per channel = 8 channel ddr4 x 2 slots per channel = 16 slots of memory , 8 x 8 MB L3 cache = 64 MB L3 cache , 8 x 2 MB L2 cache = 16 MB L2 cache , 4 x ~ 44 pci-e v3.0 links = ~ 128 pci-e links ... everything is 4x , simple as that. ..

 

I assume there's some optimizations and maybe some lower frequencies / smaller boosts in order to get these processors to use as little as 180 watts (TDP , which would work out to 45w TDP for each 8 core section - consider that when Ryzen 7 1700 is a 65w TDP part.  They may save some power by disabling the SOC part (sata controllers, usb 3.0 controllers) from a few of the modules and in order to reduce pin count on the socket ( a bit hard to have 4 x 6 sata3 and 4x2 usb 3.0 and so on, lots of extra pins and no sense wasting those pci-e v3.0 x4 lanes when they could expose them instead so people would plug SAS / hardware raid cards )

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