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AMD reportedly launching Zen and X370 motherboards at CES

Coaxialgamer
8 hours ago, Dabombinable said:

AMD's projection was near Haswell, and those several could never be even close to confirmed.

AMD's projection was +40% IPC over excavator . there are a ton of factors to consider ( cache limited ? FPU limited ? etc ) .It's never as simple as saying 40% ipc improvement = 40% better performance at equal clock speeds . Cpu design is a lot more difficult than that . Plus amd have said multiple timesthat  zen has exceeded the target , for whatever that's worth .

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1 hour ago, zMeul said:

few days ago, AMD launched their latest generation of APUs, on the same socket as ZEN will be

where the fuck are the motherboards?!?!?! except few leaks from OEMs and one GigaByte mobo (I think it was) there is nothing

as far as i know those chips/motherboards ( bristol ridge ) aren't available for general consumers ( at least not yet, if ever ) , but are only available in prebuilts designed by OEM's like hp , dell etc

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1 hour ago, Coaxialgamer said:

AMD's projection was +40% IPC over excavator . there are a ton of factors to consider ( cache limited ? FPU limited ? etc ) .It's never as simple as saying 40% ipc improvement = 40% better performance at equal clock speeds . Cpu design is a lot more difficult than that . Plus amd have said multiple timesthat  zen has exceeded the target , for whatever that's worth .

And that equated to near Haswell performance.

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Just now, Dabombinable said:

And that equated to near Haswell performance.

again , it's not as simple as taking the excavator numbers at a given frequency and extrapolating . IPC , by definition , means instructions per clocks . Instructions can be different in terms of computation power requirements . Something like " add 1+1" would be signifcantly easier to do than "shift register data from location A to B" , but both count as one instructions .It never as simple as comparing two architectures and getting out a number . Some behave better in some tasks and worse in others . For example , one area the p4 was very good at back in the day was integer calculation ,( if i remember correctly , the Integer processing unit , which i will refer as IPU was clocked at double to speed of the clock ) .  Apart from that , there are many things to consider : 

- Are current excavator chips limited by cache ( size or bandwith ) ?

-What about the introduction of SMT , which adds a 25% boost in optimized workloads ?

-What about bulldozer's ( and thus excavator's ) core structure ? I don't know much about how blender works , but from what i gathered it's fairly FPU heavy . Now a "quad core" excavator chip only has 2 FPU's , thus operates effectively as a dual core in floating point workloads . AMD have already stated that zen will use a traditional 1 IPU + 1 FPU per core ( whereas bullodzer was 2 FPU  + 1 IPU per dual core module   ), which means that in theory , even if they were to use identical FPU's in terms of instructions per cycle , they would theoretically get a 2x improvement in a chip with an equal amount of cores .

-What about the new cache structure ( a major bottleneck in bulldozer ) 

-What about the new micro ops cache ? 

- How do both architectures scale in terms of frequencies ( because of cache , you don't see noticeable improvements in excavator chips above 4ghz , but logic could apply both ways )

 

What i'm trying to say is that it's never as simple as saying architecture Z has X% better IPC than architecture E , therefor it will perform X% better at the same clock speed .

 

CPU architecture design just doesn't work that way . Zen and excavator are extremely different in terms of design . In fact, during the design phase of a chip , it's not uncommon for engineers to not be sure of how the chip performs . They design a chip with a target in mind , but they won't know if they met those targets until they bench the chip . It's likely AMD has only known about zen's exact performance for only a few months . 

 

AMD has said ( for what it's worth ) that zen has exceeded their performance targets of a "40% IPc improvement" , but for all we know it could be less.

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6 minutes ago, Coaxialgamer said:

again , it's not as simple as taking the excavator numbers at a given frequency and extrapolating . IPC , by definition , means instructions per clocks . Instructions can be different in terms of computation power requirements . Something like " add 1+1" would be signifcantly easier to do than "shift register data from location A to B" , but both count as one instructions .It never as simple as comparing two architectures and getting out a number . Some behave better in some tasks and worse in others . For example , one area the p4 was very good at back in the day was integer calculation ,( if i remember correctly , the Integer processing unit , which i will refer as IPU was clocked at double to speed of the clock ) .  Apart from that , there are many things to consider : 

- Are current excavator chips limited by cache ( size or bandwith ) ?

-What about the introduction of SMT , which adds a 25% boost in optimized workloads ?

-What about bulldozer's ( and thus excavator's ) core structure ? I don't know much about how blender works , but from what i gathered it's fairly FPU heavy . Now a "quad core" excavator chip only has 2 FPU's , thus operates effectively as a dual core in floating point workloads . AMD have already stated that zen will use a traditional 1 IPU + 1 FPU per core ( whereas bullodzer was 2 FPU  + 1 IPU per dual core module   ), which means that in theory , even if they were to use identical FPU's in terms of instructions per cycle , they would theoretically get a 2x improvement in a chip with an equal amount of cores .

-What about the new cache structure ( a major bottleneck in bulldozer ) 

-What about the new micro ops cache ? 

- How do both architectures scale in terms of frequencies ( because of cache , you don't see noticeable improvements in excavator chips above 4ghz , but logic could apply both ways )

 

What i'm trying to say is that it's never as simple as saying architecture Z has X% better IPC than architecture E , therefor it will perform X% better at the same clock speed .

 

CPU architecture design just doesn't work that way . Zen and excavator are extremely different in terms of design . In fact, during the design phase of a chip , it's not uncommon for engineers to not be sure of how the chip performs . They design a chip with a target in mind , but they won't know if they met those targets until they bench the chip . It's likely AMD has only known about zen's exact performance for only a few months . 

 

AMD has said ( for what it's worth ) that zen has exceeded their performance targets of a "40% IPc improvement" , but for all we know it could be less.

And that is why I'm still going off their projection. Its near Haswell performance in more than likely a specific task, which AMD never mentioned. I straight up don't trust AMD over their projection due to their past products.

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Just now, Dabombinable said:

And that is why I'm still going off their projection. Its near Haswell performance in more than likely a specific task, which AMD never mentioned. I straight up don't trust AMD over their projection due to their past products.

to be fair though , haswell , broadwell and skylake are all within 10% of each other...

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2 minutes ago, Coaxialgamer said:

to be fair though , haswell , broadwell and skylake are all within 10% of each other...

I know. But I'll still go off the projection from AMD, which falls just short of Haswell. With AMD you are best off not expecting much from them, that way you can actually get a pleasant surprise from them instead of the usual let downs.

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2 minutes ago, Coaxialgamer said:

 Apart from that , there are many things to consider : 

- Are current excavator chips limited by cache ( size or bandwith ) ?

-What about the introduction of SMT , which adds a 25% boost in optimized workloads ?

-What about bulldozer's ( and thus excavator's ) core structure ? I don't know much about how blender works , but from what i gathered it's fairly FPU heavy . Now a "quad core" excavator chip only has 2 FPU's , thus operates effectively as a dual core in floating point workloads . AMD have already stated that zen will use a traditional 1 IPU + 1 FPU per core ( whereas bullodzer was 2 FPU  + 1 IPU per dual core module   ), which means that in theory , even if they were to use identical FPU's in terms of instructions per cycle , they would theoretically get a 2x improvement in a chip with an equal amount of cores .

-What about the new cache structure ( a major bottleneck in bulldozer ) 

-What about the new micro ops cache ? 

- How do both architectures scale in terms of frequencies ( because of cache , you don't see noticeable improvements in excavator chips above 4ghz , but logic could apply both ways )

 

What i'm trying to say is that it's never as simple as saying architecture Z has X% better IPC than architecture E , therefor it will perform X% better at the same clock speed .

 

CPU architecture design just doesn't work that way . Zen and excavator are extremely different in terms of design . In fact, during the design phase of a chip , it's not uncommon for engineers to not be sure of how the chip performs . They design a chip with a target in mind , but they won't know if they met those targets until they bench the chip . It's likely AMD has only known about zen's exact performance for only a few months . 

 

AMD has said ( for what it's worth ) that zen has exceeded their performance targets of a "40% IPc improvement" , but for all we know it could be less.

1. Probably, as they are outperformed by FXs in many tasks despite FX being stuck at Piledriver

2. SMT adds some boost to unoptimized workloads, as SMT is only useful as a remedy to suboptimal loads. In any case, for workloads benefiting from SMT, CMT is still better, comparing 1 module to 1 core, which is the only way to compare the two). Expect higher single core performance than Excavator, but less of a multithreaded boost in Zen.

3. Not really. Partly because no workload is 100% FPU dependent, but a 2 module is more like 3 cores, not 2 (not sure about 2 modules, but 4 modules for example scale to 6.3 SP performance in cinebench, compared to ~4.5 for HT i7s).

4,5,6.: yes, we really don't know enough.

 

Don't get me wrong, despite my "clarifications", I agree with your overall point: we are in no position to accurately guess Zen's performance in relevant, real-life scenarios yet.

What I find more surprising is how "Haswell performance" is presented as something negative. An intel competitor offering Haswelll performance outside Intel's B-H-Z-X corset, with different combinations of unlocked CPUs, number of cores, and chipset features, could be a game changer for the CPU market, depending on AMD's own marketing strategies. To me, Haswell-like performance is great news; bad news would be much worse than that.

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Just now, Dabombinable said:

I know. But I'll still go off the projection from AMD, which falls just short of Haswell. With AMD you are best off not expecting much from them, that way you can actually get a pleasant surprise from them instead of the usual let downs.

i don't know . I just can't help but be optimistic , but that's mainly because i wasn't into PC's when bulldozer burned everyone . 

But I'll just be waiting for the chips to launch instead of making any kind of speculation

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10 minutes ago, SpaceGhostC2C said:

1. Probably, as they are outperformed by FXs in many tasks despite FX being stuck at Piledriver

2. SMT adds some boost to unoptimized workloads, as SMT is only useful as a remedy to suboptimal loads. In any case, for workloads benefiting from SMT, CMT is still better, comparing 1 module to 1 core, which is the only way to compare the two). Expect higher single core performance than Excavator, but less of a multithreaded boost in Zen.

3. Not really. Partly because no workload is 100% FPU dependent, but a 2 module is more like 3 cores, not 2 (not sure about 2 modules, but 4 modules for example scale to 6.3 SP performance in cinebench, compared to ~4.5 for HT i7s).

4,5,6.: yes, we really don't know enough.

 

Don't get me wrong, despite my "clarifications", I agree with your overall point: we are in no position to accurately guess Zen's performance in relevant, real-life scenarios yet.

What I find more surprising is how "Haswell performance" is presented as something negative. An intel competitor offering Haswelll performance outside Intel's B-H-Z-X corset, with different combinations of unlocked CPUs, number of cores, and chipset features, could be a game changer for the CPU market, depending on AMD's own marketing strategies. To me, Haswell-like performance is great news; bad news would be much worse than that.

1_ I agree with this , but it further adds to the confusion , that is a 40% boost would apply to a chip we don't have , that is an unleashed excavator core .

3 _true , no workload is 100% floating point ( well except maybe graphics ) , as there is always some integer calculations going on . But about the module debacle , i don't thin AMD lied about BD core count , it just depends on your definition of a core . But then again , a quad core chip only has 2 modules ( and an 8 core chip has 4 )  , but you get my point about how such a chip would behave in a theoretical 100% FPU workload .

 

I don't necessarily think haswell like performance is a bad thing . I just think that many will be disappointed , as  a lot of people have formed unrealistic expectations of what the architecture can accomplish ( heck , even if outperformed skylake some would still feel burned )

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Just now, Coaxialgamer said:

3 _true , no workload is 100% floating point ( well except maybe graphics ) , as there is always some integer calculations going on . But about the module debacle , i don't thin AMd lied about BD core count , it just depends on your definition of a core . But then again , a quad core chip only has 2 modules ( and an 8 core chip has 4 )  , but you get my point about how such a chip would behave in a theoretical 100% FPU workload .

Yes, I'm not saying 4 modules aren't 8 cores, it's just for the purpose of SMT vs CMT comparisons that it gets messy, because CMT applies to cores sharing resources, while SMT applies to individual cores, so we cannot think of  adding SMT to an FX chip or something like that. Hence, only for the purpose of comparing the advantages/disadvantages of moving from CMT to SMT, I think it makes sense to think of 1 HT cores vs 1 module. Or maybe there's just no way to make a reasonable comparison without taking into account manufacturing costs?

 

6 minutes ago, Coaxialgamer said:

I don't necessarily think haswell like performance is a bad thing . I just think that many will be disappointed , as  a lot of people have formed unrealistic expectations of what the architecture can accomplish ( heck , even if outperformed skylake some would still feel burned )

Yes, apparently as consumers we care more about who has the best $1000 chip than about what everyday choices we have on the table :P 

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1 minute ago, SpaceGhostC2C said:

Yes, I'm not saying 4 modules aren't 8 cores, it's just for the purpose of SMT vs CMT comparisons that it gets messy, because CMT applies to cores sharing resources, while SMT applies to individual cores, so we cannot think of  adding SMT to an FX chip or something like that. Hence, only for the purpose of comparing the advantages/disadvantages of moving from CMT to SMT, I think it makes sense to think of 1 HT cores vs 1 module. Or maybe there's just no way to make a reasonable comparison without taking into account manufacturing costs?

 

Yes, apparently as consumers we care more about who has the best $1000 chip than about what everyday choices we have on the table :P 

well i think their are fundamentally different philosophies behind SMT vs CMT . 

SMT is about getting the most of every core and using up what would be downtime in order to maximize throughput . It has a minimal hardware cost but only provides a "small" 20% boost .

 

CMT is more about adding extra hardware resources to greatly increase throughput ( like adding extra integer units to improve performance without having to add a full core ) , but because it has significant hardware costs , it's more of a compromise between die size vs performance . And at some point it just doesn't make sense to use CMT anymore when you could add in a full core .

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22 minutes ago, SpaceGhostC2C said:

3. Not really. Partly because no workload is 100% FPU dependent, but a 2 module is more like 3 cores, not 2 (not sure about 2 modules, but 4 modules for example scale to 6.3 SP performance in cinebench, compared to ~4.5 for HT i7s).

 

My interest is in FP heavy workloads, and things like prime95, llr, pfgw, genefer will hit FPU hard. They all run at a snails pace on current AMD CPUs. My interpretation of AMD's recent slides is this will be significantly improved in Zen, but I don't expect it to reach Intel levels per core. I hope I'm wrong there as an affordable 8 core with FP IPC comparable to Intel would demolish workloads.

 

As for Cinebench, with a 6700k fixed at at 4.2 GHz, I see a MP ratio of 3.85 with HT off, and 5.1 with HT on. The ratios may be smaller if standard turbo is on as single core clock will be boosted over 4 core clocks. For this task, it puts the HT core as being worth about 0.3 of a real core.

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9 minutes ago, Coaxialgamer said:

well i think their are fundamentally different philosophies behind SMT vs CMT . 

SMT is about getting the most of every core and using up what would be downtime in order to maximize throughput . It has a minimal hardware cost but only provides a "small" 20% boost .

 

CMT is more about adding extra hardware resources to greatly increase throughput ( like adding extra integer units to improve performance without having to add a full core ) , but because it has significant hardware costs , it's more of a compromise between die size vs performance . And at some point it just doesn't make sense to use CMT anymore when you could add in a full core .

Sure. I guess I can simplify my point like this: to predict the effect of going from Excavator to SMT, we need to know if it means going from FX-4xxx to i7, or going from FX-8xxx to i7. But none is a clean comparison anyway, there's just no "keeping everything else constant" possible here. Which just adds to the argument that one isolated experiment is a very weak basis to predict what Zen will be like.

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1 minute ago, porina said:

 

My interest is in FP heavy workloads, and things like prime95, llr, pfgw, genefer will hit FPU hard. They all run at a snails pace on current AMD CPUs. My interpretation of AMD's recent slides is this will be significantly improved in Zen, but I don't expect it to reach Intel levels per core. I hope I'm wrong there as an affordable 8 core with FP IPC comparable to Intel would demolish workloads.

 

That's mainly because a quad core chip has 2 FPU's ,so you're effectively running a dual core :D

Plus they aren't that fast to begin with ...

We know pretty much for sure zen will handle FP workloads better simply because it doesn't use the CMT approach

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2 minutes ago, Coaxialgamer said:

That's mainly because a quad core chip has 2 FPU's ,so you're effectively running a dual core :D

Plus they aren't that fast to begin with ...

We know pretty much for sure zen will handle FP workloads better simply because it doesn't use the CMT approach

The claimed 40% IPC increase has to be some average. Going from one FPU per module to one per core is already a doubling, if nothing else has changed. I really hope they improved things beyond that. Still, if this area is +100% or more IPC increase, it implies there are other areas below 40% increase too.

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11 minutes ago, porina said:

The claimed 40% IPC increase has to be some average. Going from one FPU per module to one per core is already a doubling, if nothing else has changed. I really hope they improved things beyond that. Still, if this area is +100% or more IPC increase, it implies there are other areas below 40% increase too.

well it might not hit 2X though . they might have only slightly improved it ( the bulk of the increase would come from the FPU count doubling ) . If anything , they might have done that to save die space . But AMd has claimed they've gotten better than 40% ... 

 

anyway , we won't know before we get the chips.

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48 minutes ago, Coaxialgamer said:

anyway , we won't know before we get the chips.

You're starting to sound like a broken record.

 

Doesn't mean you're wrong though. ;)

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5 hours ago, Coaxialgamer said:

That's mainly because a quad core chip has 2 FPU's ,so you're effectively running a dual core :D

Plus they aren't that fast to begin with ...

We know pretty much for sure zen will handle FP workloads better simply because it doesn't use the CMT approach

I wonder if they'll add 3Dnow instructions to Zen. Since it is good for negating some of the problems with their normally weak FPU (they were weak enough before they decided to only use 1 for every 2 ALU).

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Well guys... I heard some of you saying, that the 8c/16t Zen would have a performance around some modern skylake i5, that would be the end of AMD. Looking at the changes to the architecture, that were made, i believe, that we should expect a single-core performance of around the i5 6400 (which is enough, trust me) the multi-core performance should be higher than the haswell-e six-cores, but not on par with the eight-cores mostly due to the terrible 14nm process used by GloFo (it has a much much better density than intels one, but does not clock as high mostly because of the high density). And please don´t expect the eight-core to go for 200 bucks... In my opinion, it will be around 500 bucks.

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Does it really matter if zen is 2% faster then broadwell? if AMD can deliver cpus with the same  or even a bit worse performnce as intel with a lower price then im happy. Especially if it is a good 6 or 8 core cpu at the same price as the skylake platform.

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