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Skylake & Haswell-E PCIe lane misconception

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On 10/6/2015 at 5:19 AM, Sakkura said:

Okay, so watching the 5820K vs 6700K showdown video on Vessel, I came across a common misconception about the PCIe lanes on Skylake and Haswell-E unfortunately being perpetuated by @Slick.


The Core i7-6700K, and all the other Skylake CPUs, offers 16 PCIe 3.0 lanes. The chipset offers additional PCIe lanes separately from that. For the Z170 chipset, that's 20 PCIe 3.0 lanes, a huge boost over Z97 which had just 8 PCIe 2.0 lanes. Luke was just saying 20 lanes, which is not really correct; there is a kernel of truth to it though, because while the chipset offers all those lanes, it's still only connected to the CPU by a DMI 3.0 link that's equivalent to 4 lanes of PCIe 3.0 (in addition to the 16 lanes directly from the CPU). Still, you can hook up lots of PCIe 3.0 SSDs to the chipset just fine without affecting lanes for the GPU(s). Just don't expect RAID0 to give you like 10GB/s combined bandwidth.


As for the Core i7-5820K, it offers the well-known 28 PCIe 3.0 lanes directly from the CPU. But again, the chipset offers additional PCIe lanes. In this case, X99 is far inferior to Z170, because it only offers 8 PCIe 2.0 lanes (just like Z97).


Here are the block diagrams showing what I explained above:


Hidden Content


Do note that the lower-end chipsets, eg. H110, cut down on the PCIe connectivity on offer.

It is also correct to add that for example the motherboard Z97X-Gaming G1 WIFI-BK, was possibly the most expensive Z97 motherboard on the market because it added the chip PLX PEX8747, which by multiplexing gave us 16 lines in two PCI Express x16 (x16) / x16) or 8 lines in four PCI Express x 16, that is, (x8 / x8 / x8 / x8) was the equivalent to having a CPU of 32 PCI lines, when they really had 16.

There are motherboards that used smaller PLX chips to increase the PCI Express connectivity of the motherboard chipset eg the Asrock P67 Extreme4Gen3.

These issues are very important, but few people talk about this.

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