The things that bugs me about multi ch. ram mostly dual.ch

[We Didnt_t start_the_fire]

So I am quite experienced with PC and it's inner workings though mostly an the business and infrastructure side. 

So why does each channel of ram have 2 ram slots? I understand how the paralleled work. But wouldn't it be cheaper and more performance(given the situation for higher memory)to just make higher capacity ram with 1 channel for each stick? i.e dual channel have 2 slots and each one have one channel. 

 

For better understanding:

Numbers are just for show.

i.e      ----------------10gbps--------------lane 1------5gbps---- stick 1

                                                                       l

                                                                    ------5gbps---- stick 2

 

instead; -------------10gbps---------------lane 1------10gbps----- stick 1 (higher performance take full capacity of the lane)(should be possible to double performance of DDR)

 

I.e use case; 2x2gb am@1600mhz x2 be replaced by 1x4gb@3200mhz x2. So 4 stick 2 channels first one, then 2 channels 2 sticks second one. Completely eliminated the secondary dimm slot in the channel so we could have a larger heat sink or die space or else. Maybe it will help you understand what I meant.

 

And save the extra space for a second(or extra) channel/lane or other things such as larger die seize or heat pipes or other things. 

Each stick have iit's own lane.

Edited July 9, 2020 by We Didnt_t start_the_fire
Have the graph and better cases to illustrate

[Samfisher]

1 minute ago, We Didnt_t start_the_fire said:

So I am quite experienced with PC and it's inner workings though mostly an the business and infrastructure side. 

So why does each channel of ram have 2 ram slots? I understand how the paralleled work. But wouldn't it be cheaper and more performance(given the situation for higher memory)to just make higher capacity ram with 1 channel for each stick? i.e dual channel have 2 slots and each one have one channel. 

That would mean having to double the speed of 1 channel/slot, which has power and heat costs.

[Eighjan]

1 minute ago, We Didnt_t start_the_fire said:

So I am quite experienced with PC and it's inner workings though mostly an the business and infrastructure side. 

So why does each channel of ram have 2 ram slots? I understand how the paralleled work. But wouldn't it be cheaper and more performance(given the situation for higher memory)to just make higher capacity ram with 1 channel for each stick? i.e dual channel have 2 slots and each one have one channel. 

Depends how you want to deploy your total RAM capacity & what you want to reserve for future updates/upgrades.

Are you suggesting two channels per slot?

[We Didnt_t start_the_fire]

1 minute ago, Samfisher said:

That would mean having to double the speed of 1 channel/slot, which has power and heat costs.

Can you please clarify. 2 slots ram each one only have 50% of the speed and bandwidth capacity on hardware level?

[We Didnt_t start_the_fire]

2 minutes ago, Eighjan said:

Depends how you want to deploy your total RAM capacity & what you want to reserve for future updates/upgrades.

Are you suggesting two channels per slot?

No, 1 channel a slot. simple. with full speed. Not the 2 channel=4 slots. 2 channel=2 slots. with full feature. should be possible.

[Eighjan]

Just now, We Didnt_t start_the_fire said:

Can you please clarify. 2 slots ram each one only have 50% of the speed and bandwidth capacity on hardware level?

Boards with 4 slots offer 2 channels as it is...

[Haro]

Just now, Eighjan said:

Boards with 4 slots offer 2 channels as it is...

^

 

Just now, We Didnt_t start_the_fire said:

No, 1 channel a slot. simple. with full speed.

Boards with 4 dimms don't have 2 dimms per channel 

They're there to physically house more dram.

[Eighjan]

1 minute ago, We Didnt_t start_the_fire said:

No, 1 channel a slot. simple. with full speed.

What would be the benefit of four slots, four channels...?

Maybe x86 isn't designed to handle RAM that way...

[Samfisher]

2 minutes ago, We Didnt_t start_the_fire said:

Can you please clarify. 2 slots ram each one only have 50% of the speed and bandwidth capacity on hardware level?

I mean if you wanted a single stick of RAM to have the same bandwidth as 2 sticks of RAM in dual channel, that 1 RAM slot would need probably more than twice the power and heat.  It could be a reason why splitting them over 2 physical RAM slots is the way to go.  Power doesn't increase so linearly.

[We Didnt_t start_the_fire]

1 minute ago, Eighjan said:

Boards with 4 slots offer 2 channels as it is...

I know, thats why I am scratching my head and always bugs me that if 1 slots = 1 channel with full PCIE it should perform better. 

[Haro]

Just now, Eighjan said:

Maybe x86 isn't designed to handle RAM that way...

What? 

Quad channel heck 8 channels already exists on server cpu's and HEDT chips.

[Samfisher]

OP is trying to understand why you can't have dual channel bandwidth on 1 single slot.  At least that's what I understand from the first post.

[Haro]

Just now, We Didnt_t start_the_fire said:

me that if 1 slots = 1 channel

Its already like this. 

[We Didnt_t start_the_fire]

7 minutes ago, TofuHaroto said:

^

 

Boards with 4 dimms don't have 2 dimms per channel 

They're there to physically house more dram.

Ok, so they do not act independently and is there and controlled by the first ram IO IO chip?

 

[Eighjan]

2 minutes ago, We Didnt_t start_the_fire said:

I know, thats why I am scratching my head and always bugs me that if 1 slots = 1 channel with full PCIE it should perform better. 

RAM has worked with matched pairs of DIMMs for most of the last 20yrs.

[Eighjan]

Just now, We Didnt_t start_the_fire said:

Ok, so they do act independently and is there and controlled by the first ram IO IO chip?

 

The RAM contoller is built into the CPU - can't remember the last time we had chipset RAM controllers.

[Haro]

Just now, We Didnt_t start_the_fire said:

Ok, so they do act independently and is there and controlled by the first ram IO IO chip?

 

I'm sorry your phrasing is really confusing. 

Do you mean the ram is controlled by an IO chip ? 

The cpu has an imc ( integrated memory controller ) and it does what the name implies. A single stick goes through one channel on the cpu and the other goes through the other channel. 

If the cpu only has 2 memory channels and there are 4 sticks then it's 2 sticks per channel because physically there aren't enough memory channels to give you the extra bandwidth on the cpu.

[We Didnt_t start_the_fire]

5 minutes ago, Samfisher said:

OP is trying to understand why you can't have dual channel bandwidth on 1 single slot.  At least that's what I understand from the first post.

Not totally, but it should be possible. why split up the channel in 2 when of course I am imagining things but don't spit it should be better and save spaces to have more lanes to have more channels or other things. 

[Haro]

Just now, We Didnt_t start_the_fire said:

why split up the channel in 2

To get the extra bandwidth? 

You do realize having 1 channel memory means that bandwidth is practically cut in half?

[We Didnt_t start_the_fire]

1 minute ago, TofuHaroto said:

 

If the cpu only has 2 memory channels and there are 4 sticks then it's 2 sticks per channel because physically there aren't enough memory channels to give you the extra bandwidth on the cpu.

I just saw it and edited it, I mean not act independently. 

That is what I mean, can't we have 4 channels with 4 sticks instead of 2 channels 4 stick since the ram slot will be saved per lane.

[Haro]

4 minutes ago, We Didnt_t start_the_fire said:

can't we have 4 channels with 4 sticks instead of 2 channels 4 stick since the ram slot will be saved per lane.

If the cpu doesn't have the channels for it then you physically can't.

Edit :

and quad channels or heck even 8 channels on the cpu already exists. 

its just for high end server / HEDT chips.

Edited July 9, 2020 by TofuHaroto

[Eighjan]

4 minutes ago, We Didnt_t start_the_fire said:

can't we have 4 channels with 4 sticks instead of 2 channels 4 stick since the ram slot will be saved per lane.

You do realise that 4 slots, 4 channels would be an ungodly headache for a consumer system to manage...

That's why HEDT systems are the only ones that offer 4 channel support, due to a more powerful resource centre withing the CPU.

[We Didnt_t start_the_fire]

1 minute ago, TofuHaroto said:

To get the extra bandwidth? 

You do realize having 1 channel memory means that bandwidth is practically cut in half?

I do realize that, but then higher 1 stick speed ram with 1 channel isn't it better?

i.e      ------------------------------lane 1------- stick 1

                                                        ------- stick 2

 

instead; ----------------------------lane 1------ stick 1(higher performance take full capacity of the lane)

 

And save the extra space for a second(or extra) channel/lane or other things such as larger die seize or other things. 

Each stick have iit's own lane.

[Haro]

Just now, We Didnt_t start_the_fire said:

i.e      ------------------------------lane 1------- stick 1

                                                        ------- stick 2

 

instead; ----------------------------lane 1------ stick 1(higher performance take full capacity of the lane)

That's cutting the bandwidth in half. 

It doesn't work this way.

[Eighjan]

1 minute ago, TofuHaroto said:

That's cutting the bandwidth in half. 

It doesn't work this way.

By OP's own admission, they work in a tech space where 1 slot, 1 channel may have the resource spend to accommodate it.

 

Can you remember how far back we had that, in the consumer space?