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BachChain

Speed waits for no-one; PCIe 6 announced

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I wonder if this means we will skip a generation, kinda like how GDDR4 was (mostly) skipped.

 

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21 minutes ago, Sypran said:

I wonder if this means we will skip a generation, kinda like how GDDR4 was (mostly) skipped.

 

Doubtful. Intel will probably be jumping straight to gen 5 as soon as they can. It's also likely AMD will target it with their next socket/platform change.

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1 hour ago, Sypran said:

I wonder if this means we will skip a generation, kinda like how GDDR4 was (mostly) skipped.

1 hour ago, Trixanity said:

Doubtful. Intel will probably be jumping straight to gen 5 as soon as they can. It's also likely AMD will target it with their next socket/platform change.

Depends on how much real world advantage it provides over PCIe 4, versus how much development time it will take to implement the change.

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53 minutes ago, Jito463 said:

Depends on how much real world advantage it provides over PCIe 4, versus how much development time it will take to implement the change.

AMD will almost be forced to unless they change their paradigm because epyc customers will want as much as bandwidth they can get their hands on. They also need to keep pushing forward unless they're willing to risk giving Intel a window of opportunity to blindside them and push them out again.

 

Intel will at least do it for Xeon in some capacity. You could argue with their current strategy that they'll keep it out of consumer products.

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17 hours ago, TrigrH said:

how many times can they just keep doubling it? if its backwards compatible its probs still the same number of pins, something has to give right?

I wanted to touch on this - see in the OP they talked about PAM4 encoding?

 

In really basic terms, they are simply adding more levels of voltage that represent data. Here is something to read on it. They keep doing the same thing with wifi and LTE/5G - changing the encoding to have more states that carry data. We went from 128QAM to 256 ... to 1028. This is how they can keep the same number of lanes but shove more data through.

 

You asked when something has to give? Well, if we keep adding more voltage states eventually the states are so close together that essentially the margin of error (or noise) gets in the way and the decoders have trouble telling one state from the next. When we can't shove more states in and be able to distinguish them from each other we will have to try something new.

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29 minutes ago, Trixanity said:

AMD will almost be forced to unless they change their paradigm because epyc customers will want as much as bandwidth they can get their hands on.

On the server side, yes.  I was referring to the desktop platform (Ryzen, and probably even Threadripper).

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14 minutes ago, Jito463 said:

On the server side, yes.  I was referring to the desktop platform (Ryzen, and probably even Threadripper).

Then either AMD would need to artificially kneecap it or board vendors would need to physically do it.

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5 hours ago, Trixanity said:

Then either AMD would need to artificially kneecap it or board vendors would need to physically do it.

Or, now that AMD is back on their feet financially, they switch back to a more traditional method of having separate product lines for server and desktop.  High end tech on Epyc with mainstream tech on Ryzen (with Threadripper coming from one, the other or even both).

 

Not saying they will, but I could definitely see them doing it.

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6 hours ago, Trixanity said:

AMD will almost be forced to unless they change their paradigm because epyc customers will want as much as bandwidth they can get their hands on. They also need to keep pushing forward unless they're willing to risk giving Intel a window of opportunity to blindside them and push them out again. 

Except that's all in the I/O die and it would be relatively simple to split dies between EPYC and Ryzen/Threadripper

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5 hours ago, Jito463 said:

Or, now that AMD is back on their feet financially, they switch back to a more traditional method of having separate product lines for server and desktop.  High end tech on Epyc with mainstream tech on Ryzen (with Threadripper coming from one, the other or even both).

 

Not saying they will, but I could definitely see them doing it.

Seems unnecessary. They would have to remove their competitive advantage to do that.

4 hours ago, ravenshrike said:

Except that's all in the I/O die and it would be relatively simple to split dies between EPYC and Ryzen/Threadripper

Yes, the controllers are in the IOD. However as far as I'm aware IF runs over PCIe. At least externally. So AMD would, as I said, have to kneecap it. Granted they could actually do it physically but it would be the same difference. Of course it all depends on need but the point stands that both companies will push forward with the technology.

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On 6/19/2019 at 8:34 PM, Jito463 said:

Or, now that AMD is back on their feet financially, they switch back to a more traditional method of having separate product lines for server and desktop.  High end tech on Epyc with mainstream tech on Ryzen (with Threadripper coming from one, the other or even both).

 

Not saying they will, but I could definitely see them doing it.

The entire genius of their current method is that they can completely eliminate the need for separate production between their product lines. Rather than making a handful of each separate product and the dealing with all the yields and binning individually, they can just churn out an godly number of tiny 8 core chiplets with great yields, and then bin the whole pile and sort it accordingly. 

 

If they split their product lines then they not only dramatically increase the amount of development that they need to pay for to add a new SKU, but they also shrink the pool of dies to bin from meaning that the maximum reliable performance that they can guarantee from any given high end SKU will necessarily drop. 

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On 6/18/2019 at 7:22 PM, rawrdaysgoby said:

Well soon motherboard makers will give up on Pci-e 4.0 and head to 6 LOL 

perhaps in 5 years. 

It takes time to get things ratified and actually manufactured.

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Great this means that I need to update my motherboard when a GPU using PCIe 5.0 becomes standard. Only having to replace a year later when 6.0 comes out.

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