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TSMC started R&D on 2nm process

CiBi

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At this point, process nodes are merely marketing terms as key metrics such as pitch and gate width are similar for designs marketed under different headings.

 

This isn't really news since they just announced they will start researching it, I could say I plan on researching 1nm node, haha first.

They expect to have a 2nm facility opened by 2024 and it will be in Hsinchu, Taiwan.

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Amazing. I'm curious to see the last stages of using silicon. 

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not like x [unit] actually has anything to do with the truth, just marketing

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So much for 7nm being the limit. Guess we will have to wait and see how this all pans out in the real world. 

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For context, I had to look up the spacing between silicon atoms, which is apparently 0.235nm. That's not a lot of atoms once you shrink that far...

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3 minutes ago, porina said:

For context, I had to look up the spacing between silicon atoms, which is apparently 0.235nm. That's not a lot of atoms once you shrink that far...

So thats like 8 atoms if it actually where 2nm?

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20 minutes ago, TVwazhere said:

So much for 7nm being the limit. Guess we will have to wait and see how this all pans out in the real world. 

I always heard 5nm was the theoretical limit before quantum tunneling but I guess 2nm is splitting hairs (ba dum tss).

 

I believe there's a few new techniques that can help alleviate the issue, one being EUV (it might be named slightly different) which afaiu is the method that's being implemented.

 

There's a second method that I totally forget the name of that apparently can theoretically yield better results than extreme ultra violet but it's wildly impractical to actually implement and therefore is only really a theory at this point.

 

Also I remember there being a buzz about silicon germanium alloy a few years back but that seemed to die a death without much to show.

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isn't this how thick our DNA is? 

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At this point I’d love to see marketing mm vs actual mm. Somewhere the Intel marketing department is drinking heavily because they weren’t allowed to play these games. 

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31 minutes ago, CiBi said:

So thats like 8 atoms if it actually where 2nm?

It depends on where you measure and in which direction, but the distance I gave earlier is the closest two atoms are.

18 minutes ago, Sparviero said:

At this point I’d love to see marketing mm vs actual mm.

This is the problem we get where we try to reduce a complex multi-variable thing into a single number to represent it. One kind of way around it is what is the area taken to implement a given circuit design, but even that isn't ideal as some processes are better or worse at some things than others, and then the choice of circuit will impact that result. Still, I think a ram cell is a commonly quoted size for processes as it is one of the first things they try to make on it. It is a handful of transistors and they can easily copy/paste it to scale.

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Nah that only just means they are so confident that 5 and 3 nm will succeed that they can theoretically use the same tech to reach 2nm with less chance of failure happening

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6 hours ago, Master Disaster said:

I always heard 5nm was the theoretical limit before quantum tunneling but I guess 2nm is splitting hairs (ba dum tss).

I think it depends on the material 

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Just in time for Intel to hit 10nm!

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I don't think the problem is the marketing they use, it's hardly a spec that the average consumer even knows about.  For those in the business who stand to lose money buying the wrong production services know to ignore the marketing material.

 

 

The issue is that forum plebs like us put too much thought into it.  We carry on as if it has some greater meaning than in reality.

 

 

Grammar and spelling is not indicative of intelligence/knowledge.  Not having the same opinion does not always mean lack of understanding.  

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8 minutes ago, JustWantTech said:

When we will get 1 picometer

I don't think that is possible?

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Makes me wonder how they would bypass the quantum tunneling issue that supposedly happen under 7nm with Silicon.

 

On 6/14/2019 at 9:56 AM, JustWantTech said:

When we will get 1 picometer

Literally impossible considering the Van der Waals radius of a silicon atom is 210 picometre. You can't go lower than that... But you're not exactly going to be making a transistor with a single atom either.

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I'm not really concerned about them getting there, it's just a money problem. That said, I do wonder how many companies have the volume necessary to design a product on this node,

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4 minutes ago, TetraSky said:

But you're not exactly going to be making a transistor with a single atom either

Ahem... https://www.sciencedaily.com/releases/2018/08/180816101939.htm

 

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On 6/13/2019 at 5:08 PM, Master Disaster said:

I always heard 5nm was the theoretical limit before quantum tunneling but I guess 2nm is splitting hairs (ba dum tss).

 

I believe there's a few new techniques that can help alleviate the issue, one being EUV (it might be named slightly different) which afaiu is the method that's being implemented.

 

There's a second method that I totally forget the name of that apparently can theoretically yield better results than extreme ultra violet but it's wildly impractical to actually implement and therefore is only really a theory at this point.

 

Also I remember there being a buzz about silicon germanium alloy a few years back but that seemed to die a death without much to show.

There are likely no 2nm structures within a 2nm transistor, they'll likely be somewhat larger than that. Q. tunneling may not be a problem, Even if it is, it's just a question of probabilities: the likelihood of tunneling occurring increases quadratically as you get smaller, but it might be manageable at this scale.

Even if EUV is implemented, it will be running out of steam as well and require quad patterning IIRC. Costs will skyrocket. Also, you're probably thinking of electron lithography: theoretically it offers near perfect accuracy, but it's serial (one electron at a time).

 

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Considering tunnelling is already a problem and it's only going to get worse as you get past 5nm, I wonder how much R&D will go into this until they have to decide between just moving to a new material or continuing but finding a way to reduce tunnelling's effects.

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17 minutes ago, comander said:

It's not the forum plebs that discuss it. It's the lurkers and rare visitors that read a bit and then run off with it without a decent understanding. 

Well, They're certainly not going to get a decent understanding by reading half the posts in this thread. 

 

EDIT: just to re-iterate What I said earlier,  the people who need to know about node size and relative production technicalities don't need this forum or any general tech forum like it to understand what they are looking at.  For everyone else understanding node size and each process is a matter of interest more than anything.  No one makes a purchase based on node, they buy on observable metrics.

 

 

Grammar and spelling is not indicative of intelligence/knowledge.  Not having the same opinion does not always mean lack of understanding.  

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3 hours ago, comander said:

There are technical forums out there where people discuss these things with nuisance and it can be enlightening. With that said I don't know if they would match your definition of general tech. 

 

With that said, as the barrier to go online gets lower the level of technical sophistication, even on tech sites, gets reduced as well. 

Oh I agree,  There are specialist forums designed to allow engineers etc converse on the topic, they are generally reserved for those working in the field and are closed groups. LTT is not one of them though.  Sure we have some very well educated members, but I can assure you the content here is nearly all interest based only. 

 

 

Grammar and spelling is not indicative of intelligence/knowledge.  Not having the same opinion does not always mean lack of understanding.  

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