Intel to release 9990XE? Auction only part...

[goodtofufriday]

5 hours ago, aezakmi said:

CEO: we need a new way to rip off users

Intel engineers: k, www.google.com FX 9590 specs, ctrl+c, ctrl+v

CEO: 

Hey man my 9590 lasted me till zen1 1800x. Literally used it as my space heater

[Taf the Ghost]

30 minutes ago, goodtofufriday said:

Hey man my 9590 lasted me till zen1 1800x. Literally used it as my space heater

CPUs are actually extremely efficient heaters, in the non-joke way. Doesn't make them a great purchase, but I can definitely see a utility case for high TDP systems in high latitude climates.

[Age of 9394]

Why Intel not just lower the price?

 

[The Benjamins]

10 hours ago, Age of 9394 said:

Why Intel not just lower the price?

 

when has Intel ever done that.

[cj09beira]

On 1/14/2019 at 11:11 PM, Brooksie359 said:

How much better can it be at overclocking? It will be interesting to see just how well it holds up against 3rd gen threadripper when it comes out. 

simple asnwer is it cant, maybe on very specific workloads where memory latency has to be very low... wait nevermind  

On 1/15/2019 at 12:12 AM, S w a t s o n said:

Just want to remind everyone that AMD just showed they can beat intel 8 core vs 8 core, Ryzen 9 will be 16 core. Why would anyone buy this?

for the pcie lanes...wait. 

On 1/15/2019 at 12:26 AM, porina said:

Depends on your use cases. Until Zen2 hits, Ryzen is still extremely FP weak and you need double the number of cores to come close (and not beat) Intel consumer CPUs. If you have an AVX-512 app, that gap is even bigger.

We don't know enough yet. What clock were they running? A 16 core consumer part, if it will exist, will be ram bandwidth crippled and have lower clocks because they will have to power limit (although overclockers will push further as normal). If you need 16 Ryzen cores, threadripper makes more sense. I suspect they will keep 16 cores as an option, but would only deploy it if Intel tries to compete. 12 would seem more reasonable as a balance between clock and total power.

we have been saying that it would be crippled but have we actually seen any proof that that is the case, because for example i have looked at epyc performance on 4 channels and the performance loss is in the low 10% range which is not much at all.

On 1/15/2019 at 5:31 AM, Taf the Ghost said:

CPUs are actually extremely efficient heaters, in the non-joke way. Doesn't make them a great purchase, but I can definitely see a utility case for high TDP systems in high latitude climates.

true there was news a year or so ago about a company using epyc to heat houses while also using the compute for something else though even in those cases being efficient at compute is still more important than having more heat output as that can be had by just having more cpus

[porina]

1 minute ago, cj09beira said:

we have been saying that it would be crippled but have we actually seen any proof that that is the case, because for example i have looked at epyc performance on 4 channels and the performance loss is in the low 10% range which is no much at all.

It's not hard to predict. Zen2 is expected to finally catch up to Intel consumer CPUs per core in terms of AVX performance, with the demands that come with it. Already Intel quad cores with dual channel ram are bandwidth limited in more demanding use cases. AMD will catch up with that per core, and potentially offer more cores. It isn't going to be pretty without other mitigation in place. Maybe bigger L3 cache, maybe add L4 cache. More ram channels work, but that'll be TR platform.

[Brooksie359]

6 minutes ago, cj09beira said:

simple asnwer is it cant, maybe on very specific workloads where memory latency has to be very low... wait nevermind  

for the pcie lanes...wait. 

we have been saying that it would be crippled but have we actually seen any proof that that is the case, because for example i have looked at epyc performance on 4 channels and the performance loss is in the low 10% range which is no much at all.

true there was news a year or so ago about a company using epyc to heat houses while also using the compute for something else though even in those cases being efficient at compute is still more important than having more heat output as that can be had by just having more cpus

Heat recovery is pretty common tbh. The problem is that there is an efficiency loss so it isn't smart to have higher power for the purpose of hearing. 

[LukaH]

auction?! the proceeds better go to charity lol

[RejZoR]

Isn't Ryzen 3700X rumored to be 12c/24t with 4.2GHz base and 5GHz turbo and 105W ? I know it's still rumored thing, but damn, so little difference purely on cores but 120W difference? AUCH

[Taf the Ghost]

34 minutes ago, RejZoR said:

Isn't Ryzen 3700X rumored to be 12c/24t with 4.2GHz base and 5GHz turbo and 105W ? I know it's still rumored thing, but damn, so little difference purely on cores but 120W difference? AUCH

A process node jump will do that. Especially when you compare "hot" cores like Skylake vs "cooler" cores like Zen. Zen1 cores, even, are a fairly sizable % more efficient than Skylake cores, but they can't clock as high due to the node.

[RejZoR]

Which Intel won't have for quite a while. They'll go 10nm and how their new chips (can't remember the codename, they talked about it on Gamers Nexus in an interview with Intel guy and tech Jesus) will perform with larger caches is still to be rumored...

[cj09beira]

1 hour ago, porina said:

It's not hard to predict. Zen2 is expected to finally catch up to Intel consumer CPUs per core in terms of AVX performance, with the demands that come with it. Already Intel quad cores with dual channel ram are bandwidth limited in more demanding use cases. AMD will catch up with that per core, and potentially offer more cores. It isn't going to be pretty without other mitigation in place. Maybe bigger L3 cache, maybe add L4 cache. More ram channels work, but that'll be TR platform.

forgot about avx, thats the one scenario where dual channel is a problem, for avx heavy worloads threadripper or even epyc might be a better option.

[S w a t s o n]

1 hour ago, porina said:

 More ram channels work, but that'll be TR platform.

https://www.pcworld.com/article/3331944/components-processors/lisa-su-on-the-record-amds-ceo-talks-ryzen-vega-ray-tracing-and-lots-more-at-ces.html?page=2

Quote

Reporter: And two memory channels will be enough?

Su: As I said, more to come.

AM4+ confirmed?

[CiBi]

I assume Intel is targetting HFTs with this chip. They don't mind paying a premium for chips like this just to shave off a few ns. I think quite a few of them even run chillers on their systems. Its a very specialized market and as far as I know Intel has been selling them binned chips before now they just made a dedicated SKU for it.

[Taf the Ghost]

26 minutes ago, RejZoR said:

Which Intel won't have for quite a while. They'll go 10nm and how their new chips (can't remember the codename, they talked about it on Gamers Nexus in an interview with Intel guy and tech Jesus) will perform with larger caches is still to be rumored...

Sunny Cove is the core name. They moved to that because their Mobile space is this weird place of spanning many generations at the same time. We'll see their low-power parts this year. We might actually see Sunny Cove/Icelake on desktop this year, but as the lowest SKU models. The 8100 replacement CPU could be on the new node while the high-pref parts stay on 14nm/Comet Lake.

[cj09beira]

5 minutes ago, S w a t s o n said:

https://www.pcworld.com/article/3331944/components-processors/lisa-su-on-the-record-amds-ceo-talks-ryzen-vega-ray-tracing-and-lots-more-at-ces.html?page=2

AM4+ confirmed?

i think they will just try to clock the shit out of the 2 channels they have, do they even have enough pins left for a third channel?

[S w a t s o n]

3 minutes ago, cj09beira said:

i think they will just try to clock the shit out of the 2 channels they have, do they even have enough pins left for a third channel?

I think some trickery via that IO die they could get more channels out of same number of pins but I'm basically just speculating out of my ass. Remember, that IO die IS HUGE even the ryzen one.

[Princess Luna]

I'm only interested on 10nm at this point.

[Taf the Ghost]

2 minutes ago, cj09beira said:

i think they will just try to clock the shit out of the 2 channels they have, do they even have enough pins left for a third channel?

Pretty sure they don't have enough pins for another DDR channel.

Just now, S w a t s o n said:

I think via some trickery via that IO die they could get more channels out of same number of pins but I'm basically just speculating out of my ass. Remember, that IO die IS HUGE even the ryzen one.

AMD will eat a bit of the peak performance for a Desktop 16c, with those complaining mostly getting a "buy Threadripper". The other thing is from testing on Epyc, AMD has some brilliant load-balancing per core technology. It's very hard to actually symmetrically load all of the Cores, even in a Render task. That's how AMD will get away with 2-channel DDR4 and 16 high performant x86 cores.

[RejZoR]

2 hours ago, S w a t s o n said:

I think some trickery via that IO die they could get more channels out of same number of pins but I'm basically just speculating out of my ass. Remember, that IO die IS HUGE even the ryzen one.

IO die is mostly huge because they are made on larger nodes than the core itself. Till now, memory controller had to be made in same node as the core because of monolithic design. With modular "chiplet" design, you can stick a 22nm IO chip next to 7nm actual core. It was similar in the past and I think still applies, where motherboard chipsets were several node revisions older designs compared to CPU's.

[S w a t s o n]

Just now, RejZoR said:

IO die is mostly huge because they are made on larger nodes than the core itself. Till now, memory controller had to be made in same node as the core because of monolithic design. With modular "chiplet" design, you can stick a 22nm IO chip next to 7nm actual core. It was similar in the past and I think still applies, where motherboard chipsets were several node revisions older designs compared to CPU's.

No, it's fairly large even for 14nm (it's not 22nm?), compare the IO sections of a monolithic cpu to the size of the IO die, it's got cache on it almost for sure

[RejZoR]

I said 22nm just as an example. Yeah, caches are usually largest die surface area. We're talking L3 and L4 caches of course, L1 and L2 are usually rather tiny but ridiculously fast.

[S w a t s o n]

2 minutes ago, RejZoR said:

I said 22nm just as an example. Yeah, caches are usually largest die surface area. We're talking L3 and L4 caches of course, L1 and L2 are usually rather tiny but ridiculously fast.

Probably just L3 but basically I'm saying it's way too big to be just normal IO, we could see them do some fun shit with it

[Tellos]

intel is now beyond desperate, limited run auctioned CPUs. I think Intel is having more trouble then they claim.

[porina]

Quote

Update 1/17: Intel has sent us a second comment, confirming its existance, the target market, and the reasons for the auction:

“The Intel® Core™ i9-9990XE is designed specifically for the financial services industry because of specific customer requirements. Because the Intel® Core™ i9-9990XE was built with unique specifications and high frequency to meet the workload needs of this targeted industry, it can only be produced in limited quantities and will not be broadly made available. The part will be offered through an auction to ensure fairness in supply distribution.” – Intel spokesperson 

From: https://www.anandtech.com/show/13804/intel-core-i9-9990xe-up-to-5-ghz-auction-only

 

So... basically it's a special product for HFT.