LOL @ something on PCGamesN's "The Ryzen response: Intel have forgotten how to deal with a genuinely competitive AMD" page.

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Gone is the old tick-tock model of CPU evolution and now it looks like Intel have killed the process>architecture>optimisation release cadence too. That little marketing fudge on the difficulty they were having hitting 10nm didn’t even last one cycle. Instead, as a result of Intel remaining on the 14nm lithography for the fourth generation in a row, it looks like they’re moving towards a process>architecture>optimise>flog-the-expired-equine release cadence.

Personally, I wish Intel would slow down the release cadence, to maybe one generation every 3 to 5 years or so, like they had over their first 25 years or so of X86.

Take the time on getting things right, having larger per-generation improvements, like what was seen with single-threaded IPC / performance with 8086 -> 286, 386 -> 486, 486 -> P5, etc.

The slowest CPU from a new generation should be faster than the fastest CPU from the previous generation.

Go back to Tick/Tock, but with a few changes.

• Tick / Die-Shrink = only on mobile & servers, where power consumption is a priority.
• Tock / Architecture = only on mainstream & HEDT, where performance is a priority.

Don't change sockets so often.  I think a good suggestion would be the longest warranty length of high-end power supply lines, like from EVGA and Corsair, as a guide.  Also if possible use the same socket across the entire stack, so if someone wants to start with like a Celeron or Atom, then upgrade to a Xeon E7 or Xeon Phi later, they can.

P.S. Didn't think this was quite worthy of a forum post.  If I did, it would have gone in CPUs, Motherboards, and Memory.